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Tuesday, August 12, 2008


Was at a job interview so missed the last lecture. RTOS modelling in hardware. Model system and decide what hardware features should be taken advantage of by using simulation.

Motivation for reactive processors: remove polling of environment, Esterel. Current Esterel approaches to compilation: software that creates code that can run on general processors, hardware that creates gate-level netlist or state machines. New proposed approach uses reactive processors to create simplified code and speed ups.

ReMIC has a non-reactive core with a RISC like processor. Going through the data and control path of the processor.

Composed and transmitted from my iPod Touch